“Power supply design can be divided into three stages: (A) design strategy and IC selection, (b) schematic design, simulation and testing, and (c) device layout and routing. Investing time in the (a) design and (b) simulation phases can prove the validity of the design concept, but in the real test, you need to put everything together and test it on the test bench. In this article, we will skip directly to step (c), because there are already a lot of materials that introduce ADI’s analog and design power tools, all of which can be downloaded for free, such as LTpowerPlanner®, LTpowerCad®, LTspice® and LTpowerPlay®.The first part of this topic mainly introduces
Introduction: Challenges faced by engineers in an ever-evolving era
Power supply design can be divided into three stages: (A) design strategy and IC selection, (b) schematic design, simulation and testing, and (c) device layout and routing. Investing time in the (a) design and (b) simulation phases can prove the validity of the design concept, but in the real test, you need to put everything together and test it on the test bench. In this article, we will skip directly to step (c), because there are already a lot of materials that introduce ADI’s analog and design power tools, all of which can be downloaded for free, such as LTpowerPlanner®, LTpowerCad®, LTspice® and LTpowerPlay®. The first part of this topic mainly introduces (a) strategy.
This topic is discussed in two parts. This article is the second part, which mainly introduces some problems that may be overlooked when designing multi-rail power supplies. The first part focuses on strategy and topology, while this article focuses on the details of power budget and circuit board layout. Since many application boards require multiple power rails, this two-part topic introduces the multi-power circuit board solution in detail. The goal is to achieve a high-quality initial design through reasonable device positioning and routing to highlight some power budgets and routing skills.
In power supply design, careful layout and wiring are essential to achieve an excellent design. Enough space should be reserved for size, accuracy, and efficiency to avoid problems in production. We can use years of testing experience and the professional knowledge of layout engineers to finally complete the circuit board production.
The design may appear to be no problem from the drawing (that is, from the perspective of the schematic), even during the simulation, but the real test is actually in the layout, PCB manufacturing, and prototyping by loading the circuit. After the stress test. This part uses real design examples and introduces some techniques to help avoid pitfalls. We will introduce several important concepts to help avoid design flaws and other pitfalls in order to avoid the need to redesign and/or remake the PCB in the future. Figure 1 shows how the cost will rise rapidly after the design enters production without careful testing and margin analysis.
Figure 1. When there is a problem with the produced circuit board, the cost may rise sharply
You need to pay attention to systems that operate as expected under normal conditions, but fail to operate as expected when full-speed mode or unstable data begins to appear (after noise and interference have been eliminated).
When exiting the cascade phase, avoid current limiting. Figure 2 shows a typical cascaded application: (A) shows a design composed of an ADP5304 step-down regulator (PSU1) that generates a 3.3 V power supply and a maximum current of 500 mA. In order to improve efficiency, designers should tap the 3.3 V rail instead of the 5 V input power supply. The 3.3 V output is further cut off to power PSU2 (LT1965). This LDO regulator is used to further reduce the voltage to 2.5 V and limit the maximum output current to 1.1 A in accordance with the requirements of the on-board 2.5 V circuit and IC.
This kind of system has some very typical hidden problems. It can operate normally under normal conditions. However, when the system initializes and starts to run at full speed—for example, when the microprocessor and/or ADC start high-speed sampling—the problem arises. Since there is no voltage regulator that can generate a higher voltage at the output than at the input, in Figure 2a, the maximum power of VOUT1 (P = V × I) used to power the combined circuit VOUT1 and VOUT2 is 3.3 V × 0.5 A = 1.65 W . The premise of obtaining this value is that the efficiency is 100%, but because there will be losses during the power supply process, the actual power is lower than this value. Assume that the maximum usable power of the 2.5 V power rail is 2.75 W. If the circuit tries to obtain so much power, but this requirement is not met, irregular behavior will occur when PSU1 starts to limit current. The current may start to limit due to PSU1, and worse, some controllers shut down completely due to overcurrent.
If Figure 2a is implemented after successful troubleshooting, a higher power controller may be required. The most ideal case is to replace it with a pin-compatible, higher current device; in the worst case, the PCB needs to be completely redesigned and manufactured. If you can consider the power budget before the conceptual design phase begins, you can avoid potential project planning delays (see Figure 1).
With this in mind, first create a real power budget and then select the controller. Including all the power rails you need: 2.5 V, 3.3 V, 5 V, etc. This includes all pull-up resistors, discrete devices, and ICs that consume power from each rail. Use these values to work in reverse to estimate the power supply you need as shown in Figure 2b. Use power tree system design tools, such as LTpowerPlanner (Figure 3) to easily create a power tree that supports the required power budget.
Place and route
The correct layout and routing can prevent the track from being burnt due to the wrong trace width, wrong vias, insufficient number of pins (connectors), wrong contact size, etc., which will cause current limitation. The following chapters introduce some noteworthy points and also provide several PCB design techniques.
Connectors and pin headers
Extending the total current of the example shown in Figure 2 to 17 A, the designer must consider the current handling contact capability of the pins, as shown in Figure 4. Generally speaking, the current-carrying capacity of a pin or contact point is affected by several factors, such as the size of the pin (contact area), metal composition, and so on. A typical through-hole male connection pin with a diameter of 1.1 mm1 draws approximately 3 A. If you need 17 A, you should make sure that your design has enough pins to handle the overall current-carrying capacity. This can be easily achieved by increasing the current-carrying capacity of each conductor (or contact) and retaining some safety margins so that the current-carrying capacity exceeds the total current consumption of the PCB circuit.
In this example, 6 pins are needed to achieve 17 A (with 1A margin). A total of 12 pins are required for VCC and GND. To reduce the number of contacts, consider using power sockets or larger contacts.
Use the available online PCB tools to help determine the current capability of the layout. The current-carrying capacity of a one-ounce copper PCB with a track width of 1.27 mm is about 3 A, and when the track width is 3 mm, the current-carrying capacity is about 5 A. There is also some margin, so the width of the 20 A rail needs to be 19 mm (about 20 mm) (please note that this example does not consider the effect of temperature rise). It can be seen from Figure 4 that because of the space constraints of the PSU and the system circuit, the 20 mm power rail width cannot be achieved. To solve this problem, a simple solution is to use a multilayer PCB. Reduce the wiring width to (for example) 3 mm, and copy these wiring to all layers in the PCB to ensure that the sum of the wiring (in all layers) can reach a current-carrying capacity of at least 20 A.
Vias and connections
Figure 5 shows an example of a via that is connecting multiple power layers of the controller’s PCB. If you choose 1 A vias but need 2 A current, then the rail width must be able to carry 2 A current, and the via connection must be able to handle this current. The example shown in Figure 5 requires at least two vias (three if space permits) to connect the current to the power plane. This problem is often overlooked, and generally only one via is used for connection. After the connection is completed, this via will be used as a fuse, it will blow, and disconnect the power connection with the adjacent layer. Poorly designed vias are difficult to improve and solve later, because the blown vias are difficult to notice or are covered by other devices.
Please pay attention to the following parameters about vias and PCB power rails: rail width, via size and electrical parameters are affected by several factors, such as PCB coating, routing layer, operating temperature, etc. These factors will ultimately affect the current-carrying capacity. Previous PCB design techniques did not consider these dependencies, but designers need to pay attention to these when determining layout parameters. Many PCB power rail/via calculators are currently available online. After the designer completes the schematic design, it is best to consult the PCB manufacturer or layout engineer for these details.
There are many factors that can cause heat generation, such as enclosures, airflow, etc., but this section focuses on exposed pads. Controllers with exposed pads, such as LTC3533, ADP5304, ADP2386, ADP5054, etc., will have lower thermal resistance if they are properly connected to the circuit board. Generally speaking, if the power MOSFET of the controller IC is placed in the die (that is, the whole chip), the pad of the IC is usually exposed for heat dissipation. If the converter IC uses an external power MOSFET to operate (as a controller IC), then the control IC usually does not need to use an exposed pad, because its main heating source (power MOSFET) itself is outside the IC.
Generally, these exposed pads must be soldered to the PCB ground plane to be effective. Depending on the IC, there are some exceptions. Some controllers will specify that they can be connected to an isolated pad PCB area to act as a heat sink for heat dissipation. If unsure, please refer to the data sheet of the relevant part.
When you connect the exposed pads to a PCB plane or isolated area, (a) make sure to connect these holes (many arranged in an array) to the ground plane for heat dissipation (heat transfer). For multi-layer PCB ground layers, it is recommended to use vias to connect the ground layers on all layers below the pads together. For more information, please refer to the “Basics of Thermal Design” tutorial MT-093, 2AN136: “PCB Layout Considerations for Non-Isolated Switching Power Supplies,” 3, and AN139: “Power Layout and EMI.” 4
Please note that the discussion about exposed pads is related to the controller. Using exposed pads in other ICs may require very different processing methods.
Conclusion and summary
It is a challenge to design a low-noise power supply that will not affect the system circuit due to burnout of power rails or vias. It is a challenge in terms of cost, efficiency, efficiency, and PCB area size. This article highlights some areas that designers may overlook, such as using power budget analysis to build a power tree to support all back-end loads.
Schematic and simulation are only the first step in the design, followed by careful device positioning and routing techniques. Vias, electric rails, and current-carrying capacity must all meet the requirements and be evaluated. If there is switching noise at the interface position, or the switching noise reaches the power pin of the IC, the system circuit will malfunction, and it will be difficult to isolate and troubleshoot the fault.